There is disclosed a 2-wire differential-end bus transceiver system comprising: an I2C master, a master transceiver, a differential system, a slave transceiver and an I2C slave, wherein the master transceiver is adapted to encode master data SDA and master clock SCL received from I2C master using Manchester code, generate master single wire signal and transfer it to the differential system, the master transceiver is also adapted to decode Manchester-encoded slave signal received from the differential system and transfer the decoded slave data to I2C master;the differential system is adapted to transform the master single wire signal to differential signal and transfer it, then transform it back to master single wire signal and send it to the slave transceiver, the differential system is also adapted to transform the slave single wire signal to differential signal and transfer it, then transform it back to the slave single wire signal and send it to the master transceiver;the slave transceiver is adapted to encode slave data received from I2C slave using Manchester code, generate slave single wire signal and transfer it to the differential system, the slave transceiver is also adapted to decode Manchester-encoded master signal received from the differential system, generate the recovered master clock and transfer the decoded master data and recovered master clock to I2C slave. Associated methods are also disclosed.