The present invention discloses a memory unit device. The memory unit device comprises a gate ONO layer, a gate electrode material layer and side walls. A source region and a drain region respectively align with corresponding side walls. The gate electrode material layer is not overlaid with the source region and the drain region at two sides completely. A channel region comprises a gate control channel region covered by the gate electrode material layer and conductive channel regions at two sides of the gate control channel region. The conductive channel region and the corresponding source region or drain region are overlaid and are used for connection between the channel of the gate control channel region and the source and drain regions. An anti-drain disturb capacity of the memory unit device is improved by adjusting a ratio of a distance between the source region and the drain region to a width of the gate electrode material layer, and a conductive resistance of the conductive channel region. The present invention further discloses a manufacture method of the memory unit device. The anti-drain disturb capacity is improved, characteristics of operations like programming, erasing, and reading of the memory device are generally maintained, and the area of the unit device is not changed.