The invention discloses a limit test template generation method based on a FPGA (field programmable gate array). By applying the method, common signals with random noise outside can be used to generate high-quality limit test templates. The method includes: accumulating frequency values of each frame of collected waveform data within set time; according to frequency value information obtained by performing accumulation operation on frequency value information of multiple frames of waveform data, extracting high-quality standard waveform; generating limit test template data by software according to the extracted standard waveform, level set by a user and vertical allowance. The method is realized on the basis of FPGA hardware, limit test template generation speed is high, and efficiency and accuracy of limit template testing can be improved.