The invention discloses a scribing groove test structure. A same wafer comprises a chip formation area and a scribing groove. The test structure is formed in the scribing groove. A first bonding pad of the test structure is formed in the chip formation area and is formed through diagramming a top-layer front-side metal layer. Through more than one front-side metal layer and a corresponding contact hole, the test structure is connected to the first bonding pad. A width of the scribing groove is less than a size of the first bonding pad in the narrowest position. Through setting the first bonding pad in the chip formation area, the width of the scribing groove is not influenced by the size of the first bonding pad so that the size of the scribing groove is reduced and an integrated level of a chip on the wafer is increased. The invention also discloses a test method of the scribing groove test structure. The integrated level of the chip can be increased and cost is reduced.