The invention discloses an SPAD (Single Photon Avalanche Diode) array-stage readout circuit adopting a quadratic correlation double sampling technology. The circuit comprises a CDS (Correlated DoubleSampling) readout circuit and a sample hold circuit; a first-stage CDS readout circuit is composed of one voltage follower, two switching circuits and one sampling capacitor, and is connected to eachuniversal serial bus for ensuring fast readout of information of a pixel unit, and eliminating fixed pattern noises in the pixel unit; and a second-stage CDS readout circuit is composed of two voltagefollowers, two switching circuits and two sampling capacitors, and is used for eliminating fixed pattern noises in the readout circuit. A quadratic correlation double sampling array-stage readout circuit requires only two control signals, and a time sequence signal is simple. The SPAD array-stage readout circuit adopting the quadratic correlation double sampling technology provided by the invention has the advantages of being simple in time sequence control and fast in readout speed; two stages of CDS require only two control signals, and the readout speed is fast, which improves the workingefficiency of the readout circuit, therefore, the advantages are obvious in large-scale pixel array circuits.