A three-level circuit comprises switching transistors T1 to T4, diodes D1 to D8 and two current limiting devices: a first pin of T1 is connected to a positive bus bar, a second pin of T1 is connectedto a first pin of T2 and a cathode of D5, a second pin of T2 is connected to a cathode of D3, an anode of D5 is connected to a cathode of D6, an anode of D3 and D6 is connected to a cathode of D4, andan anode of D4 is connected to a negative bus bar. The second pin of T4 is connected to the negative bus bar, the first pin of T4 is connected to the second pin of T3 and the D8 anode, the first pinof T3 is connected to the D2 anode, the cathode of D8 is connected to the anode of D7, the cathode of D7 and D2 is connected to the anode of D1, and the cathode of D1 is connected to the positive busbar. The anode of D5 and D7 is connected to the midpoint of the bus bar, the cathode of D3 is connected to the cathode of D2, and the anode of D2 is connected to the AC terminal. The cathodes of D5 and D7 are connected through a current limiting device. The anodes of D6 and D8 are connected by another current limiting device. The present application reduces the reverse voltages of D2 and D3 and does not cause D6, D7 overcurrent damage.