Invention Publication
EP1008049A1 ARRANGEMENT AND METHOD FOR HANDLING BUS CLOCK SPEED VARIATIONS
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安排和方法BUSTAKTGESCHWINDIGHEITSÄNDERUNGEN的治疗
- Patent Title: ARRANGEMENT AND METHOD FOR HANDLING BUS CLOCK SPEED VARIATIONS
- Patent Title (中): 安排和方法BUSTAKTGESCHWINDIGHEITSÄNDERUNGEN的治疗
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Application No.: EP97948495.3Application Date: 1997-11-20
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Publication No.: EP1008049A1Publication Date: 2000-06-14
- Inventor: HEWITT, Larry, D.
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: 5204 East Ben White Boulevard,Mail Stop 562 Austin, TX 78741 US
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: 5204 East Ben White Boulevard,Mail Stop 562 Austin, TX 78741 US
- Agency: Picker, Madeline Margaret
- Priority: US754206 19961120
- International Announcement: WO9822877 19980528
- Main IPC: G06F11/30
- IPC: G06F11/30 ; G06F13/42
Abstract:
An arrangement for monitoring clock frequency variations on a peripheral bus is provided to improve operations of the peripheral device despite changes in the clock frequency. In one aspect of the arrangement, a processing unit is coupled to a host bus which in turn is coupled to a peripheral bus which is coupled to a peripheral device. A monitoring arrangement is provided which detects a change in the clock frequency of the peripheral bus and determines if the frequency change exceeds a threshold associated with the peripheral device. If the threshold is exceeded, the peripheral device is informed that the clock frequency of the peripheral bus has changed. A peripheral device operating a different operating levels may use the information from the monitoring arrangement to alter the operating level of the peripheral device to conform to the new bus clock frequency.
Public/Granted literature
- EP1008049B1 ARRANGEMENT AND METHOD FOR HANDLING BUS CLOCK SPEED VARIATIONS Public/Granted day:2001-09-12
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