Invention Grant
- Patent Title: Semiconductor device and method of inspecting a semiconductor device
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Application No.: US15335941Application Date: 2016-10-27
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Publication No.: US10006958B2Publication Date: 2018-06-26
- Inventor: Kaoru Sakaguchi
- Applicant: SII Semiconductor Corporation
- Applicant Address: JP Chiba
- Assignee: ABLIC INC.
- Current Assignee: ABLIC INC.
- Current Assignee Address: JP Chiba
- Agency: Brinks Gilson & Lione
- Priority: JP2015-212166 20151028
- Main IPC: G01R31/02
- IPC: G01R31/02 ; G01R31/26 ; G05F3/26

Abstract:
Provided is a semiconductor device including a MOS analog circuit which has a high reliability and a low manufacturing cost, and in which latent failure is easily detected. The MOS analog circuit is switched to a test state or an operating state based on a control signal that is externally supplied. In the test state, a voltage between a power supply terminal and a reference terminal is applied to a gate oxide film of a MOS transistor included in the MOS analog circuit.
Public/Granted literature
- US20170122997A1 SEMICONDUCTOR DEVICE AND METHOD OF INSPECTING A SEMICONDUCTOR DEVICE Public/Granted day:2017-05-04
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