Memory controller utilizing an error coding dispersal function
Abstract:
A computing core includes memory and a memory controller. The memory is partitioned into a user section and a kernel section. The user section is divided into a first set of pillars and the kernel section is divided into a second set of pillars. The memory controller is operable to dispersed storage error encode a data segment of user data into a set of encoded user data slices. The memory controller is further operable to store the set of encoded user data slices in the first set of pillars of the user section. The memory controller is further operable to dispersed storage error encode a data segment of system data into a set of encoded system data slices. The memory controller is further operable to store the set of encoded system data slices in the second set of pillars of the kernel section.
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