Invention Grant
- Patent Title: Parallel plate waveguide for power circuits
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Application No.: US15380722Application Date: 2016-12-15
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Publication No.: US10008411B2Publication Date: 2018-06-26
- Inventor: Reinhold Bayerer
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H02M7/60
- IPC: H02M7/60 ; H01L23/00 ; H01L21/768 ; H01L23/66

Abstract:
A power semiconductor package includes a first group of semiconductor dies attached to a first side of a substrate and evenly distributed over a width of the substrate and a second group of semiconductor dies attached to the first side of the substrate and evenly distributed over the substrate width. Each die in the first and second groups has all terminals at one side which is attached to the first side of the substrate and an insulated or isolated face at a side opposite the side with the terminals. A first intermediary metal layer of the substrate forms a first DC terminal. A second intermediary metal layer of the substrate forms a second DC terminal. These intermediary metal layers are insulated from one another and form a parallel plate waveguide. Additional power semiconductor package embodiments are described.
Public/Granted literature
- US20170194200A1 Parallel Plate Waveguide for Power Circuits Public/Granted day:2017-07-06
Information query
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