Invention Grant
- Patent Title: Method of semiconductor integrated circuit fabrication
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Application No.: US15282981Application Date: 2016-09-30
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Publication No.: US10008418B2Publication Date: 2018-06-26
- Inventor: De-Wei Yu , Chia-Ping Lo , Liang-Gi Yao , Weng Chang , Yee-Chia Yeo , Ziwei Fang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/3105 ; H01L21/8238 ; H01L21/336 ; H01L21/324 ; H01L21/02 ; H01L21/268

Abstract:
A method of semiconductor device fabrication includes providing a substrate including a first fin element and a second fin element extending from the substrate. A first layer is formed over the first and second fin elements, where the first layer includes a gap. A laser anneal process is performed to the substrate to remove the gap in the first layer. An energy applied to the first layer during the laser anneal process is adjusted based on a height of the first layer.
Public/Granted literature
- US20180096898A1 METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION Public/Granted day:2018-04-05
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