Invention Grant
- Patent Title: Method to form silicide and contact at embedded epitaxial facet
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Application No.: US15723373Application Date: 2017-10-03
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Publication No.: US10008499B2Publication Date: 2018-06-26
- Inventor: Kwan-Yong Lim , James Walter Blatchford , Shashank S. Ekbote , Younsung Choi
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/8234 ; H01L27/092 ; H01L23/535 ; H01L29/417

Abstract:
An integrated circuit with an MOS transistor abutting field oxide and a gate structure on the field oxide adjacent to the MOS transistor and a gap between an epitaxial source/drain and the field oxide is formed with a silicon dioxide-based gap filler in the gap. Metal silicide is formed on the exposed epitaxial source/drain region. A CESL is formed over the integrated circuit and a PMD layer is formed over the CESL. A contact is formed through the PMD layer and CESL to make an electrical connection to the metal silicide on the epitaxial source/drain region.
Public/Granted literature
- US20180047728A1 METHOD TO FORM SILICIDE AND CONTACT AT EMBEDDED EPITAXIAL FACET Public/Granted day:2018-02-15
Information query
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