Display device having reduced parasitic capacitance and cross-talk and method of manufacturing the same
Abstract:
A display device and a method of manufacturing the same are disclosed. In one aspect, the display device includes a plurality of pixels, wherein each pixel includes a scan line extending in a first direction. Each pixel also includes a data line extending in a second direction crossing the first direction and a driving thin-film transistor (TFT) formed adjacent to the data line and including a gate electrode, a source electrode, and a drain electrode. The pixel also includes an interlayer insulating layer formed between the data line and the driving TFT, and a first through hole is formed in the interlayer insulating layer to be adjacent to the data line and the gate electrode. Each pixel also includes a driving voltage line formed adjacent to the data line and including a first portion formed in the first through hole and formed on the interlayer insulating layer.
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