Invention Grant
- Patent Title: On-chip apparatus and method for jitter measurement
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Application No.: US14949888Application Date: 2015-11-24
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Publication No.: US10009017B2Publication Date: 2018-06-26
- Inventor: Pei-Yuan Chou , Jinn-Shyan Wang , Yeong-Jar Chang
- Applicant: Faraday Technology Corp.
- Applicant Address: TW Hsin-Chu
- Assignee: Faraday Technology Corp.
- Current Assignee: Faraday Technology Corp.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Priority: TW104118853A 20150611
- Main IPC: G01R31/02
- IPC: G01R31/02 ; H03L7/06 ; H03K5/14 ; G01R31/317 ; H03K5/00

Abstract:
An apparatus for jitter measurement includes a first delay circuit, a second delay circuit, and a control circuit. The first delay circuit imposes a preliminary phase delay on an input signal to generate a delayed input signal. The second delay circuit operates with the first delay circuit to impose a fine phase delay on the delayed input signal. The control circuit controls amounts of delays imposed by the first and second delay circuits, and fine tunes the phase delay of the delayed input signal according to the amounts of delays respectively imposed by delay elements of the first and second delay circuits, and estimates or calculates a jitter window for the input signal according to adjustment results of the first and second delay circuits.
Public/Granted literature
- US20160363619A1 ON-CHIP APPARATUS AND METHOD FOR JITTER MEASUREMENT Public/Granted day:2016-12-15
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