Soft error detection in a memory system
Abstract:
An integrated circuit (IC) device including a first memory device, a second memory device stacked with the first memory device, and one or more memory controllers configured to detect a first error in data stored in the first memory device at a first physical location in the IC device, and upon detecting the first error, determine whether there is a second error in data stored in the second memory device in a second physical location in the IC device near the first physical location.
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