Invention Grant
- Patent Title: Method of manufacturing semiconductor integrated circuit device
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Application No.: US15818007Application Date: 2017-11-20
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Publication No.: US10014253B2Publication Date: 2018-07-03
- Inventor: Hirofumi Harada
- Applicant: SII Semiconductor Corporation
- Applicant Address: JP
- Assignee: ABLIC Inc.
- Current Assignee: ABLIC Inc.
- Current Assignee Address: JP
- Agency: Adams & Wilks
- Priority: JP2015-044971 20150306; JP2015-046302 20150309; JP2015-194573 20150930
- Main IPC: H01L21/52
- IPC: H01L21/52 ; H01L23/525 ; H01L23/00
Abstract:
A semiconductor integrated circuit device capable of stably forming a fuse element that is used to adjust the characteristics of the semiconductor integrated circuit device, and a method of manufacturing the semiconductor integrated circuit device are provided. The thickness of an interlayer insulating film above the fuse element is reduced by using an amorphous silicon layer that is formed by sputtering as a material of the fuse element, and by forming the amorphous silicon layer at the same time as metal wiring is formed. The steady ease of laser trimming processing is thus accomplished in the semiconductor integrated circuit device and the method of manufacturing the semiconductor integrated circuit device.
Public/Granted literature
- US20180090437A1 METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Public/Granted day:2018-03-29
Information query
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