Invention Grant
- Patent Title: Methods of forming memory arrays
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Application No.: US15391604Application Date: 2016-12-27
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Publication No.: US10014302B1Publication Date: 2018-07-03
- Inventor: Werner Juengling
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/108
- IPC: H01L27/108

Abstract:
Some embodiments include a method of forming a memory array. A wordline is formed to extend along a first direction, and along a rail of semiconductor material. After the wordline is formed, the rail is patterned into fins. Each fin has a first pedestal, a second pedestal, and a trough between the first and second pedestals. Charge-storage devices are formed to be electrically coupled with the first pedestals. Digit lines are formed to be electrically coupled with the second pedestals. Some embodiments include apparatuses containing finFETs.
Public/Granted literature
- US20180182765A1 Methods of Forming Memory Arrays Public/Granted day:2018-06-28
Information query
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