Invention Grant
- Patent Title: Semiconductor structure with multiple transistors having various threshold voltages
-
Application No.: US15047052Application Date: 2016-02-18
-
Publication No.: US10014387B2Publication Date: 2018-07-03
- Inventor: Dalong Zhao , Teymur Bakhishev , Lance Scudder , Paul E. Gregory , Michael Duane , U. C. Sridharan , Pushkar Ranade , Lucian Shifren , Thomas Hoffmann
- Applicant: Mie Fujitsu Semiconductor Limited
- Applicant Address: JP Kuwana
- Assignee: MIE FUJITSU SEMICONDUCTOR LIMITED
- Current Assignee: MIE FUJITSU SEMICONDUCTOR LIMITED
- Current Assignee Address: JP Kuwana
- Agency: Baker Botts L.L.P.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L27/088 ; H01L29/10 ; H01L21/8234

Abstract:
A semiconductor structure includes first, second, and third transistor elements each having a first screening region concurrently formed therein. A second screening region is formed in the second and third transistor elements such that there is at least one characteristic of the screening region in the second transistor element that is different than the second screening region in the third transistor element. Different characteristics include doping concentration and depth of implant. In addition, a different characteristic may be achieved by concurrently implanting the second screening region in the second and third transistor element followed by implanting an additional dopant into the second screening region of the third transistor element.
Public/Granted literature
- US20160163823A1 Semiconductor Structure with Multiple Transistors Having Various Threshold Voltages Public/Granted day:2016-06-09
Information query
IPC分类: