A power converter in which a plurality of semiconductor switches are connected to a plurality of drive circuits configured to control states of the semiconductor switches includes a first semiconductor switch, a second semiconductor switch, a first drive circuit, a second drive circuit, and a multilayer substrate in which a first wiring, and a second wiring are disposed. In the multilayer substrate, a reference potential wiring and a control signal wiring of the first wiring are disposed in different layers at positions overlapping in a substrate lamination direction, a reference potential wiring and a control signal wiring of the second wiring are disposed in different layers at positions overlapping in the lamination direction, and a wiring length of a portion in which the first wiring and the second wiring overlap in the lamination direction is set to be shorter than either a wiring length of a portion in which the reference potential wiring and the control signal wiring of the first wiring overlap in the lamination direction or a wiring length of a portion in which the reference potential wiring and the control signal wiring of the second wiring overlap in the lamination direction.