Invention Grant
- Patent Title: Compensation circuit for input voltage offset of error amplifier and error amplifier circuit
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Application No.: US15687115Application Date: 2017-08-25
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Publication No.: US10014848B1Publication Date: 2018-07-03
- Inventor: I-Hsiu Ho
- Applicant: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
- Applicant Address: TW Hsinchu
- Assignee: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
- Current Assignee: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, PC
- Main IPC: H03K5/003
- IPC: H03K5/003 ; H03K19/0185

Abstract:
A compensation circuit for compensating an input voltage offset of an error amplifier has a level shifter, a first trimming circuit, a second trimming circuit, and a compensation current sinking device. The level shifter shifts levels of a feedback voltage and a predetermined reference voltage and outputs a level shifted feedback voltage and a level shifted reference voltage. The first trimming circuit adjusts the level shifted reference voltage by trimming a first resistance thereof according to a trimming code, wherein the trimming code has the ratio relation of the input voltage offset and a resistance to be trimmed. The second trimming circuit adjusts the level shifted feedback voltage by trimming a second resistance thereof according to a trimming code. The compensation current sinking device sinks currents passing through the first and second trimming circuits.
Information query
IPC分类: