Invention Grant
- Patent Title: Implementing barriers to efficiently support cumulativity in a weakly-ordered memory system
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Application No.: US15141030Application Date: 2016-04-28
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Publication No.: US10019374B2Publication Date: 2018-07-10
- Inventor: Guy L. Guthrie , Hugh Shen , Derek E. Williams
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Steven L. Bennett; Michael R. Long
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/0893 ; G06F12/0891 ; G06F9/30 ; G06F9/38 ; G06F12/0897
Abstract:
A technique for operating a lower level cache memory of a data processing system includes receiving an operation that is associated with a first thread. Logical partition (LPAR) information for the operation is used to limit dependencies in a dependency data structure of a store queue of the lower level cache memory that are set and to remove dependencies that are otherwise unnecessary.
Public/Granted literature
- US20170315919A1 IMPLEMENTING BARRIERS TO EFFICIENTLY SUPPORT CUMULATIVITY IN A WEAKLY-ORDERED MEMORY SYSTEM Public/Granted day:2017-11-02
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