Invention Grant
- Patent Title: Multilayer wiring substrate
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Application No.: US14841278Application Date: 2015-08-31
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Publication No.: US10021791B2Publication Date: 2018-07-10
- Inventor: Yuichi Sugiyama , Masashi Miyazaki
- Applicant: TAIYO YUDEN CO., LTD.
- Applicant Address: JP Tokyo
- Assignee: TAIYO YUDEN CO., LTD.
- Current Assignee: TAIYO YUDEN CO., LTD.
- Current Assignee Address: JP Tokyo
- Agency: Chen Yoshimura LLP
- Priority: JP2014-179470 20140903
- Main IPC: H05K7/00
- IPC: H05K7/00 ; H05K3/46 ; H01L23/14 ; H05K1/18 ; H01L23/498 ; H05K3/42

Abstract:
In one embodiment of the present invention, a multilayer wiring substrate includes: a first wiring substrate having a first core member made of metal with cavities therein; a second wiring substrate having a second core member made of metal; and a bonding layer between the first wiring substrate and the second wiring substrate to bond a top surface of the first wiring substrate to a bottom surface of the second wiring substrate, the bonding layer having a patterned conductive layer.
Public/Granted literature
- US20160066417A1 MULTILAYER WIRING SUBSTRATE Public/Granted day:2016-03-03
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