The present disclosure relates to an array substrate and a touch panel. The array substrate includes a pixel electrode layer, a first touch electrode layer and an insulation layer and a second touch electrode layer arranged on the first touch electrode layer in sequence. The pixel electrode layer is not overlapped with at least one of the first touch electrode layer and the second touch electrode layer, and the insulation layer is not provided within a vertical projection area of the pixel electrode layer. In this way, when the thickness of the insulation layer between the first touch electrode layer and the second touch electrode layer is increased to reduce the parasitic capacitance between the touch electrode layers, the dimension of the liquid crystal capacitor and the storage capacitor is prevented from being affected.