Invention Grant
- Patent Title: Pipeline processor execution stages, secure emulation logic, gating debug/profile output
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Application No.: US15471234Application Date: 2017-03-28
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Publication No.: US10025955B2Publication Date: 2018-07-17
- Inventor: Gary L. Swoboda
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F21/74
- IPC: G06F21/74 ; G06F15/78

Abstract:
The present disclosure describes systems and methods for controlling access to secure debugging and profiling features of a computer system. Some illustrative embodiments include a system that includes a processor, and a memory coupled to the processor (the memory used to store information and an attribute associated with the stored information). At least one bit of the attribute determines a security level, selected from a plurality of security levels, of the stored information associated with the attribute. Asserting at least one other bit of the attribute enables exportation of the stored information from the computer system if the security level of the stored information is higher than at least one other security level of the plurality of security levels.
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