A non-volatile memory device is provided as follows. A substrate has a peripheral circuit. A first semiconductor layer is disposed on the substrate. The first semiconductor layer includes a memory cell region. A first gate structure is disposed on the first semiconductor layer. The first gate structure includes a plurality of first gate electrodes stacked in a perpendicular direction to the first semiconductor layer and a plurality of vertical channel structures penetrating the plurality of first gate electrodes. The first gate structure is arranged in the memory cell region. A second gate structure is disposed on the substrate. The second gate structure includes a plurality of second gate electrodes stacked in the perpendicular direction to the first semiconductor layer. The second gate structure is arranged outside the memory cell region.