Invention Grant
- Patent Title: Method for compensating for temperature effects in semiconductor device structures using a diode structure and a tunable resistor
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Application No.: US15799243Application Date: 2017-10-31
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Publication No.: US10026753B2Publication Date: 2018-07-17
- Inventor: Juergen Faul
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L27/02 ; H01L23/50

Abstract:
A method includes providing a semiconductor device structure including a substrate having a semiconductor-on-insulator (SOI) region and a hybrid region. A semiconductor device is provided in the SOI region. The semiconductor device includes a gate structure, a diode structure provided in the hybrid region and coupled to a substrate material of the SOI region, a supply circuit arrangement including first and second supply lines, a first resistor coupled between the first supply line and a first terminal of the diode structure, and a second resistor coupled between the second supply line and the substrate material positioned beneath the gate structure. At least one of the first and second resistors comprises a tunable resistor. A resistance of the tunable resistor is adjusted so as to adjust a threshold voltage (Vt) of the semiconductor device in dependence on an operating temperature of the SOI region.
Public/Granted literature
- US20180053789A1 COMPENSATION OF TEMPERATURE EFFECTS IN SEMICONDUCTOR DEVICE STRUCTURES Public/Granted day:2018-02-22
Information query
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