Invention Grant
- Patent Title: Superlattice memory and crosspoint memory device
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Application No.: US15427402Application Date: 2017-02-08
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Publication No.: US10026780B2Publication Date: 2018-07-17
- Inventor: Yoshiki Kamata
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JP2016-022984 20160209
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L29/15 ; H01L45/00

Abstract:
According to one embodiment, a memory includes a resistance change layer includes a first chalcogenide layer, and a second chalcogenide layer having a composition different from that of the first chalcogenide layer which are stacked alternately, and the resistance change layer having a superlattice structure, and a semiconductor layer of a first conductivity type provided on a one of main surfaces of the resistance change layer.
Public/Granted literature
- US20170229513A1 SUPERLATTICE MEMORY AND CROSSPOINT MEMORY DEVICE Public/Granted day:2017-08-10
Information query
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