Heterostructure with stress controlling layer
Abstract:
A solution for fabricating a device is described. The solution can include fabricating a heterostructure for the device, which includes at least one stress controlling layer. The stress controlling layer can include one or more attributes varies as a function of a lateral position based on a target variation of stresses in a semiconductor layer located directly under the stress controlling layer. Embodiments are further directed to a heterostructure including at least one stress controlling layer and a device including the heterostructure.
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