- Patent Title: Phase locked loops having decoupled integral and proportional paths
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Application No.: US15356335Application Date: 2016-11-18
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Publication No.: US10027333B2Publication Date: 2018-07-17
- Inventor: Abhirup Lahiri , Nitin Gupta , Gagan Midha
- Applicant: STMicroelectronics International N.V.
- Applicant Address: NL Amsterdam
- Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
- Current Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
- Current Assignee Address: NL Amsterdam
- Agency: Slater Matsil, LLP
- Main IPC: H03L7/093
- IPC: H03L7/093 ; H03L7/08 ; H03L7/099 ; H03L7/089

Abstract:
An embodiment circuit includes a first charge pump configured to generate a first current at a first node, and a second charge pump configured to generate a second current at a second node. The circuit further includes an isolation buffer coupled between the first node and the second node and an adder having a first input coupled to the second node. The circuit additionally includes an auxiliary charge pump configured to generate a third current at a second input of the adder, and an oscillator having an input coupled to an output of the adder.
Public/Granted literature
- US20180145695A1 Phase Locked Loops Having Decoupled Integral and Proportional Paths Public/Granted day:2018-05-24
Information query
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