Examples of techniques for statistical static timing analysis of an integrated circuit are disclosed. In accordance with aspects of the present disclosure, a computer-implemented method for statistical static timing analysis of an integrated circuit is provided. The method may comprise identifying a timing parameter that contributes to a delay calculation. The method may further comprise determining, by a processing device, whether the identified timing parameter significantly impacts the delay calculation. The method may also comprise, responsive to determining that the identified timing parameter does not significantly impact the delay calculation, avoiding a sensitivity calculation for the identified timing parameter.