Invention Grant
- Patent Title: Managing deferred contexts in a cache tiling architecture
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Application No.: US14043411Application Date: 2013-10-01
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Publication No.: US10032242B2Publication Date: 2018-07-24
- Inventor: Ziyad S. Hakura , Jeffrey A. Bolz , Amanpreet Grewal , Matthew Johnson , Andrei Khodakovsky
- Applicant: NVIDIA Corporation
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G06T1/20
- IPC: G06T1/20

Abstract:
A method for managing bind-render-target commands in a tile-based architecture. The method includes receiving a requested set of bound render targets and a draw command. The method also includes, upon receiving the draw command, determining whether a current set of bound render targets includes each of the render targets identified in the requested set. The method further includes, if the current set does not include each render target identified in the requested set, then issuing a flush-tiling-unit-command to a parallel processing subsystem, modifying the current set to include each render target identified in the requested set, and issuing bind-render-target commands identifying the requested set to the tile-based architecture for processing. The method further includes, if the current set of render targets includes each render target identified in the requested set, then not issuing the flush-tiling-unit-command.
Public/Granted literature
- US20170206623A9 MANAGING DEFERRED CONTEXTS IN A CACHE TILING ARCHITECTURE Public/Granted day:2017-07-20
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