- Patent Title: Approach to caching decoded texture data with variable dimensions
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Application No.: US14049557Application Date: 2013-10-09
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Publication No.: US10032246B2Publication Date: 2018-07-24
- Inventor: Eric T. Anderson , Poornachandra Rao
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G06T11/40
- IPC: G06T11/40 ; G06T1/60

Abstract:
A texture processing pipeline is configured to store decoded texture data within a cache unit in order to expedite the processing of texture requests. When a texture request is processed, the texture processing pipeline queries the cache unit to determine whether the requested data is resident in the cache. If the data is not resident in the cache unit, a cache miss occurs. The texture processing pipeline then reads encoded texture data from global memory, decodes that data, and writes different portions of the decoded memory into the cache unit at specific locations according to a caching map. If the data is, in fact, resident in the cache unit, a cache hit occurs, and the texture processing pipeline then reads decoded portions of the requested texture data from the cache unit and combines those portions according to the caching map.
Public/Granted literature
- US20150097851A1 APPROACH TO CACHING DECODED TEXTURE DATA WITH VARIABLE DIMENSIONS Public/Granted day:2015-04-09
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