Invention Grant
- Patent Title: Sense amplifier layout for FinFET technology
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Application No.: US15289351Application Date: 2016-10-10
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Publication No.: US10032490B2Publication Date: 2018-07-24
- Inventor: Yen-Huei Chen , Chien Chi Linus Tien , Kao-Cheng Lin , Jung-Hsuan Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: G01R19/00
- IPC: G01R19/00 ; G11C7/06 ; H01L21/28 ; G11C11/419 ; H01L21/8234 ; H01L23/528 ; H01L23/552 ; H01L27/02 ; H01L27/088 ; H01L27/11 ; H01L29/06 ; H01L21/20 ; H01L27/092

Abstract:
A sense amplifier (SA) comprises a semiconductor substrate having an oxide definition (OD) region, a pair of SA sensing devices, a SA enabling device, and a sense amplifier enabling signal (SAE) line for carrying an SAE signal. The pair of SA sensing devices have the same poly gate length Lg as the SA enabling device, and they all share the same OD region. When enabled, the SAE signal turns on the SA enabling device to discharge one of the pair of SA sensing devices for data read from the sense amplifier.
Public/Granted literature
- US20170032827A1 SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY Public/Granted day:2017-02-02
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