Invention Grant
- Patent Title: Interconnection structure with confinement layer
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Application No.: US15614339Application Date: 2017-06-05
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Publication No.: US10032698B2Publication Date: 2018-07-24
- Inventor: Hsiao Yun Lo , Yung-Chi Lin , Yang-Chih Hsueh , Tsang-Jiuh Wu , Wen-Chih Chiou
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company
- Current Assignee: Taiwan Semiconductor Manufacturing Company
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/50 ; H01L21/44 ; H01L21/768 ; H01L23/532 ; H01L23/00 ; H01L21/288 ; H01L23/525

Abstract:
An interconnection structure and method disclosed for providing an interconnection structure that includes conductive features having reduced topographic variations. The interconnection structure includes a contact pad disposed over a substrate. The contact pad includes a first layer of a first conductive material and a second layer of a second conductive material over the first layer. The first conductive material and the second conductive material are made of substantially the same material and have a first average grain size and a second average grain size that is smaller than the first average grain size. The interconnection structure also includes a passivation layer covering the substrate and the contact pad, and the passivation layer has an opening exposing the contact pad.
Public/Granted literature
- US20170271242A1 Interconnection Structure with Confinement Layer Public/Granted day:2017-09-21
Information query
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