Invention Grant
- Patent Title: LDMOS with improved breakdown voltage and with non-uniformed gate dielectric and gate electrode
-
Application No.: US14713819Application Date: 2015-05-15
-
Publication No.: US10032902B2Publication Date: 2018-07-24
- Inventor: Eng Huat Toh , Jae Gon Lee , Chung Foong Tan , Elgin Quek
- Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Ditthavong & Steiner, P.C.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/49 ; H01L29/51 ; H01L29/423

Abstract:
An LDMOS is formed with a second gate stack over n− drift region, having a common gate electrode with the gate stack, and having a higher work function than the gate stack. Embodiments include a device including a substrate; a first well and a second well in the substrate, the first well being doped with a first conductivity type dopant, the second well being doped with a second conductivity type dopant, and the second well surrounding the first well; a source in the first well and a drain in the second well; a doped region of the first conductivity type dopant in the first well, the doped region functioning as a body contact to the first well; a first gate stack on a portion of the first well; a second gate stack on a portion of the second well, the first and second gate stacks having a common gate electrode.
Public/Granted literature
- US20150325697A1 LDMOS WITH IMPROVED BREAKDOWN VOLTAGE Public/Granted day:2015-11-12
Information query
IPC分类: