Invention Grant
- Patent Title: Method and apparatus for dynamic memory termination
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Application No.: US15423431Application Date: 2017-02-02
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Publication No.: US10033382B2Publication Date: 2018-07-24
- Inventor: James A. McCall , Kuljit S. Bains
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: H03K19/00
- IPC: H03K19/00 ; G11C11/4093 ; G11C11/4074

Abstract:
Described herein are a method and an apparatus for dynamically switching between one or more finite termination impedance value settings to a memory input-output (I/O) interface of a memory in response to a termination signal level. The method comprises: setting a first termination impedance value setting for a termination unit of an input-output (I/O) interface of a memory; assigning the first termination impedance value setting to the termination unit when the memory is not being accessed; and switching from the first termination impedance value setting to a second termination impedance value setting in response to a termination signal level.
Public/Granted literature
- US20170237431A1 METHOD AND APPARATUS FOR DYNAMIC MEMORY TERMINATION Public/Granted day:2017-08-17
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