Invention Grant
- Patent Title: Instruction and logic to provide vector blend and permute functionality
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Application No.: US13977734Application Date: 2011-12-23
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Publication No.: US10037205B2Publication Date: 2018-07-31
- Inventor: Robert Valentine , Bret L. Toll , Jesus Corbal , Jeffrey G. Wiedemeier , Sridhar Samudrala
- Applicant: Robert Valentine , Bret L. Toll , Jesus Corbal , Jeffrey G. Wiedemeier , Sridhar Samudrala
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Lowenstein Sandler LLP
- International Application: PCT/US2011/067245 WO 20111223
- International Announcement: WO2013/095657 WO 20130627
- Main IPC: G06F15/00
- IPC: G06F15/00 ; G06F15/76 ; G06F9/30 ; G06F9/38

Abstract:
Vector blend and permute functionality are provided, responsive to instructions specifying: a destination vector register comprising fields to store vector elements, a first vector register, a vector element size, a second vector register, and a third operand. Indices are read from fields in the second register. Each index has a first selector portion and a second selector portion. Corresponding unmasked vector elements are stored to fields of the destination register, wherein each vector element, responsive to the respective first selector portion having a first value, is copied to an intermediate vector from a corresponding data field of the first register, and responsive to the respective first selector portion having a second value, is copied to the intermediate vector from a corresponding data field of the third operand. Then unmasked data fields of the destination are replaced by data fields in the intermediate vector indexed by the corresponding second selector portions.
Public/Granted literature
- US20140372727A1 INSTRUCTION AND LOGIC TO PROVIDE VECTOR BLEND AND PERMUTE FUNCTIONALITY Public/Granted day:2014-12-18
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