Invention Grant
- Patent Title: Semiconductor apparatus
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Application No.: US15490322Application Date: 2017-04-18
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Publication No.: US10037939B2Publication Date: 2018-07-31
- Inventor: Jun Maede
- Applicant: ROHM CO., LTD.
- Applicant Address: JP Kyoto
- Assignee: ROHM CO., LTD.
- Current Assignee: ROHM CO., LTD.
- Current Assignee Address: JP Kyoto
- Agency: Cantor Colburn LLP
- Priority: JP2007-316342 20071206
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/528 ; H01L23/532 ; H01L23/522

Abstract:
A semiconductor apparatus has a configuration in which multiple copper wiring layers and multiple insulating layers are alternately layered. A low-impedance wiring is formed occupying a predetermined region. A first wiring pattern includes multiple copper wiring members arranged in parallel with predetermined intervals in a first copper wiring layer, each of which has a rectangular shape extending in a first direction. A second wiring pattern includes multiple copper wiring members arranged in parallel with predetermined intervals in a second copper wiring layer adjacent to the first copper wiring layer, each of which has a rectangular shape extending in a second direction orthogonal to the first direction. The region occupied by the first wiring pattern and that occupied by the second wiring pattern are arranged such that they at least overlap. The first wiring pattern and the second wiring pattern are electrically connected so as to have the same electric potential.
Public/Granted literature
- US20170221809A1 SEMICONDUCTOR APPARATUS Public/Granted day:2017-08-03
Information query
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