Invention Grant
- Patent Title: Methods for removal of selected nanowires in stacked gate all around architecture
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Application No.: US14880362Application Date: 2015-10-12
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Publication No.: US10038053B2Publication Date: 2018-07-31
- Inventor: Karthik Balakrishnan , Kangguo Cheng , Pouya Hashemi , Alexander Reznicek
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Harrington & Smith
- Agent Louis J. Percello
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/06 ; H01L21/02 ; H01L21/324 ; H01L21/84 ; H01L27/12 ; H01L29/49 ; H01L21/8234 ; H01L21/8238 ; H01L29/66 ; H01L29/775 ; H01L29/51

Abstract:
A method forms first and second sets of fins. The first set includes a first stack of layer pairs where each layer pair contains a layer of Si having a first thickness and a layer of SiGe having a second thickness. The second set of fins includes a second stack of layer pairs where at least one layer pair contains a layer of Si having the first thickness and a layer of SiGe having a third thickness greater than the second thickness. The method further includes removing the layers of SiGe from the first stack leaving first stacked Si nanowires spaced apart by a first distance and from the second stack leaving second stacked Si nanowires spaced apart by a second distance corresponding to the third thickness. The method further includes forming a first dielectric layer on the first nanowires and a second, thicker dielectric layer on the second nanowires.
Public/Granted literature
- US20170104060A1 METHODS FOR REMOVAL OF SELECTED NANOWIRES IN STACKED GATE ALL AROUND ARCHITECTURE Public/Granted day:2017-04-13
Information query
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