Invention Grant
- Patent Title: Method and apparatus for high frequency analog-to-digital conversion
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Application No.: US15689237Application Date: 2017-08-29
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Publication No.: US10042000B2Publication Date: 2018-08-07
- Inventor: Nicolas Moeneclaey
- Applicant: STMicroelectronics (Grenoble 2) SAS
- Applicant Address: FR Grenoble
- Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee Address: FR Grenoble
- Agency: Slater Matsil, LLP
- Priority: FR1659885 20161013; FR1750825 20170201
- Main IPC: H03M1/50
- IPC: H03M1/50 ; G01R31/3193 ; G01R31/3187 ; H04L7/00 ; H03L7/18 ; H03L7/085 ; G01R31/317 ; H03M1/12 ; H03M1/00 ; H04N5/335 ; H04N3/14 ; H01L27/146

Abstract:
A method can be used to generate a reference clock signal having a reference frequency. N clock sub-signals are generated, where N is greater than or equal to 2. The N clock sub-signals are successively mutually shifted out of phase by π/N and each clock sub-signal has an elementary frequency that is equal to the reference frequency divided by N. The N clock sub-signals are propagated over propagation paths. The elementary frequency and a length of the longest propagation path are chosen so that each sub-signal has an acceptable degree of deformation. The duration of each sub-signal edge is longer than quarter of the period of the reference frequency. The reference clock signal is generated by EXCLUSIVE OR combining the propagated clock sub-signals at the end of their respective propagation paths.
Public/Granted literature
- US20180106864A1 METHOD AND APPARATUS FOR HIGH FREQUENCY ANALOG-TO-DIGITAL CONVERSION Public/Granted day:2018-04-19
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