Invention Grant
- Patent Title: Reference current circuit architecture
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Application No.: US15364689Application Date: 2016-11-30
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Publication No.: US10042377B2Publication Date: 2018-08-07
- Inventor: Sonali Gupta , Arindam Raychaudhuri
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Daniel R. Simek
- Main IPC: G05F3/26
- IPC: G05F3/26

Abstract:
An apparatus includes a plurality of mirrored transistor pairs configured to provide a first output current, and a second output current that is substantially equal to the first output current. The apparatus also includes a load isolation transistor configured to pass the first output current along to a resistive load and a first and a second biasing transistor configured to bias the load isolation transistor with a load biasing voltage. A gate and drain of the second biasing transistor may be connected to a gate of the load isolation transistor and a drain of the first biasing transistor. Furthermore, a source of the second biasing transistor may be connected to a gate of the first biasing transistor. The width-to-length ratio of the load isolation transistor, the first biasing transistor, and the second biasing transistor are selected to eliminate PTAT dependencies in the first output current.
Public/Granted literature
- US20180150097A1 REFERENCE CURRENT CIRCUIT ARCHITECTURE Public/Granted day:2018-05-31
Information query
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