A semiconductor memory device includes a cell array including a plurality of memory cells; a sense amplifier reading data of the memory cell; write drivers writing data to the memory cell; a sub cell area including the cell array, the sense amplifier, and the write driver; a memory area including a plurality of sub cell areas; and a control circuit, when performing a first operation of supplying a first voltage to a selected sub cell area, supplying first write data to the sub cell area which performs the first operation, for selecting the sub cell area as a target of the first operation.