Invention Grant
- Patent Title: Multilevel ferroelectric memory cell for an integrated circuit
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Application No.: US15823230Application Date: 2017-11-27
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Publication No.: US10043567B2Publication Date: 2018-08-07
- Inventor: Stefan Slesazeck , Halid Mulaosmanovic
- Applicant: NaMLab gGmbH
- Applicant Address: DE Dresden
- Assignee: NaMLab gGmbH
- Current Assignee: NaMLab gGmbH
- Current Assignee Address: DE Dresden
- Agency: Edell, Shapiro & Finnan, LLC
- Priority: DE102015015854 20151203
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/22 ; H01L29/78 ; H01L29/51 ; H01L27/11507 ; H01L49/02 ; H01L27/1159

Abstract:
An integrated circuit includes a ferroelectric memory cell. The ferroelectric memory cell includes a ferroelectric layer stack comprising at least one ferroelectric material oxide layer. Each of the ferroelectric material oxide layers includes a ferroelectric material that is at least partially in a ferroelectric state. The ferroelectric layer stack comprises at least two ferroelectric domains. Further, the voltage which is to applied to the layer stack to induce polarization reversal differs for the individual domains such that polarization reversal of individual domains or of a portion of the totality of ferroelectric domains within the ferroelectric material of can be attained.
Public/Granted literature
- US20180082729A1 Multilevel Ferroelectric Memory Cell for an Integrated Circuit Public/Granted day:2018-03-22
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