Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US15682455Application Date: 2017-08-21
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Publication No.: US10043813B2Publication Date: 2018-08-07
- Inventor: Nobuo Tsuboi
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2015-138369 20150710
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L27/11 ; H01L21/28 ; H01L29/786 ; H01L23/535 ; H01L29/66 ; H01L29/49 ; H01L29/78

Abstract:
A semiconductor device can be reduced in size. The semiconductor device has a first conductivity type p type well layer extending in the X direction of the main surface of a semiconductor substrate; a reference potential wire coupled with the p type well layer, and extending in the X direction; first and second active regions arranged on the opposite sides of the reference potential wire in the Y direction; and a gate electrode layer extending in the Y direction in such a manner as to cross with the first and second active regions . Then, the gate electrode layer has a first gate electrode of a second conductivity type at the crossing part with the first active region, a second gate electrode of the second conductivity type at the crossing part with the second active region, and a non-doped electrode between the first gate electrode and the second gate electrode.
Public/Granted literature
- US20170373072A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2017-12-28
Information query
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