Invention Grant
- Patent Title: Reducing impedance discontinuities on a printed circuit board (‘PCB’)
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Application No.: US14570701Application Date: 2014-12-15
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Publication No.: US10045434B2Publication Date: 2018-08-07
- Inventor: Candice L. Coletrane , Bradley D. Herrman
- Applicant: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
- Applicant Address: SG Singapore
- Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Current Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Kennedy Lenart Spraggins LLP
- Agent Brandon C. Kennedy; Jason A. Friday
- Main IPC: H03H7/38
- IPC: H03H7/38 ; H05K1/02 ; H05K1/11

Abstract:
A printed circuit board (‘PCB’) comprising: an interior socket configured to receive a connector pin of a first electronic component, the connector pin characterized by a pin impedance; a signal trace coupled to the interior socket, the signal trace configured to transmit electrical signals between the first electronic component and other electronic components mounted on the PCB, the signal trace characterized by a trace impedance; and an insulator between the interior socket and a sleeve that surrounds the interior socket, the sleeve physically configured such that an effective pin impedance matches the trace impedance within a predetermined threshold, wherein the effective pin impedance represents the resistance experienced by electrical signals passing through the connector pin when the connector pin is inserted into the interior socket.
Public/Granted literature
- US20160174359A1 REDUCING IMPEDANCE DISCONTINUITIES ON A PRINTED CIRCUIT BOARD ('PCB') Public/Granted day:2016-06-16
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