Invention Grant
- Patent Title: Method of manufacturing a semiconductor device having a vertical edge termination structure
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Application No.: US15424118Application Date: 2017-02-03
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Publication No.: US10049912B2Publication Date: 2018-08-14
- Inventor: Alexander Breymesser , Andre Brockmeier , Elmar Falck , Francisco Javier Santos Rodriguez , Holger Schulze
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/78 ; H01L29/78 ; H01L29/06 ; H01L23/00
Abstract:
A method of manufacturing a semiconductor device includes forming a frame trench extending from a first surface into a base substrate, forming, in the frame trench, an edge termination structure comprising a glass structure, forming a conductive layer on the semiconductor substrate and the edge termination structure, and removing a portion of the conductive layer above the edge termination structure. A remnant portion of the conductive layer forms a conductive structure that covers a portion of the edge termination structure directly adjoining a sidewall of the frame trench.
Public/Granted literature
- US20170148663A1 Method of Manufacturing a Semiconductor Device Having a Vertical Edge Termination Structure Public/Granted day:2017-05-25
Information query
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