A total harmonic distortion (THDi) reduction circuit for a power factor correction (PFC) controller to control a PFC stage. The THDi reduction circuit determines whether an input signal, such as an alternating current (AC) line voltage is a high voltage or low voltage signal. For a high voltage input signal, the THDi reduction circuit may limit the duty cycle of a control signal to a PFC stage to minimize a voltage spike at the zero-crossing point of the input signal and thereby minimize THDi. For a low voltage input signal, the THDi reduction circuit may extend the duty cycle of the control signal to the PFC stage, while ensuring that the control signal has at least a predetermined off-time, i.e. the duty cycle is less than 100 percent. Extending the control signal duty cycle, especially for low voltage input signals under high load, may minimize THDi.