Invention Grant
- Patent Title: System on chip power management
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Application No.: US14611648Application Date: 2015-02-02
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Publication No.: US10055001B2Publication Date: 2018-08-21
- Inventor: Jin Quan Shen , Yong Peng Chng , Caihua Zheng , Choon Kiat Tan
- Applicant: Seagate Technology LLC
- Applicant Address: US CA Cupertino
- Assignee: SEAGATE TECHNOLOGY LLC
- Current Assignee: SEAGATE TECHNOLOGY LLC
- Current Assignee Address: US CA Cupertino
- Agency: Holzer Patel Drennan
- Main IPC: G06F12/16
- IPC: G06F12/16 ; G06F1/32 ; G06F9/4401 ; G06F3/0362 ; G06F11/07 ; G06F21/64 ; G11C11/406 ; G06F3/06

Abstract:
An implementation of a system disclosed herein provides an apparatus, comprising a system on chip, wherein the system on chip is configured to receive a sleep command from a host and in response to the sleep command, calculate a primary checksum of a block of data from a low latency memory such as a tightly coupled memory (TCM), copy the primary checksum and the block of data into a volatile storage media, preserve interface variables of the system on chip in the volatile storage media, operate the volatile storage media in a self-refresh mode, and shut down power to other components on the system on chip.
Public/Granted literature
- US20160224099A1 SYSTEM ON CHIP POWER MANAGEMENT Public/Granted day:2016-08-04
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