A memory control device, which includes a signal generating circuit, a data writing circuit and a repeating circuit. The repeating circuit is coupled to the data writing circuit. The signal generating circuit is configured to generate a data strobe signal and send the data strobe signal to a memory. The data strobe signal comprises a preamble signal. The data writing circuit is configured to write a series of data to the memory according to the data strobe signal. The repeating circuit is configured to repeat a first data of the series of data in a period of the preamble signal.