Invention Grant
- Patent Title: Method of manufacturing a CMOS transistor
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Application No.: US15389501Application Date: 2016-12-23
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Publication No.: US10062616B2Publication Date: 2018-08-28
- Inventor: Min Kuck Cho , Myeong Seok Kim , In Chul Jung
- Applicant: MagnaChip Semiconductor, Ltd.
- Applicant Address: KR Cheongju-si
- Assignee: Magnachip Semiconductor, Ltd.
- Current Assignee: Magnachip Semiconductor, Ltd.
- Current Assignee Address: KR Cheongju-si
- Agency: NSIP Law
- Priority: KR10-2016-0093494 20160722
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/092 ; H01L21/266 ; H01L29/66

Abstract:
A CMOS transistor manufacturing method includes: forming a gate insulating film on a semiconductor substrate; forming a first gate electrode pattern on the gate insulating film in an NMOS transistor area; forming a second gate electrode pattern on the gate insulating film in a PMOS transistor area; forming a first photoresist pattern covering the NMOS transistor area to expose the second gate electrode pattern; performing a first ion injection process into the PMOS transistor area to form an n-type well region and a p-type LDD region; removing the first photoresist pattern; forming a second photoresist pattern covering the PMOS transistor area to expose the first gate electrode pattern; performing a second ion injection process into the NMOS transistor area to form a p-type well region and an n-type LDD region; removing the second photoresist pattern; and forming sidewall spacers at sidewalls of the first and second gate electrode patterns.
Public/Granted literature
- US20180025948A1 METHOD OF MANUFACTURING A CMOS TRANSISTOR Public/Granted day:2018-01-25
Information query
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